Login

CISTER QuickNews - 21 Nov 2013

CISTER Quicknews

21, Nov, 2013

CISTER

 CISTER QuickNews


Welcome to the November 21, 2013 edition of CISTER QuickNews.

CISTER QuickNews is a newsletter providing up-to-date information on the activities and results of the Research Centre in Real-Time and Embedded Computing Systems, being disseminated monthly to a selected audience.

For more information, contact us at cister-info@isep.ipp.pt, or visit www.cister.isep.ipp.pt. For the QuickNews archive, visit http://www.cister.isep.ipp.pt/quicknews/.

Quick look

1. Successful Review of European Project ENCOURAGE
2. P-SOCRATES: FP7 European Project led by CISTER/INESC-TEC Just Started
3. Best Presentation Award at RTNS 2013
4. European Project Proposal To Head For Negotiation Phase
5. CISTER/INESC-TEC Researcher Successfully Defends His PhD
6. New PhD Student at CISTER/INESC-TEC

Successful Review of European Project ENCOURAGE

CISTER researchers Luis Miguel Pinho and Michele Albano, participated in the 2nd of October in the second year review meeting of the ENCOURAGE project, which took place in the University of Aalborg, Denmark. The meeting was bracketed by internal consortium meetings, for review preparation (Oct 1st) and follow-up activities (Oct 3rd).

The ENCOURAGE project, of the FP7/ARTEMIS Embedded Computing Systems Initiative, aims to develop embedded intelligence and integration technologies that will directly optimize energy usage in buildings with renewable energy and enable active participation in the future smart grid environment.

In the ENCOURAGE project, CISTER is leader of the WP8 Work package (exploitation, dissemination and standardization) and of the T2.3 task, responsible for defining the ENCOURAGE architecture. During this second year, CISTER also had to take the role of responsible for the specification and development of the ENCOURAGE middleware (and in particular of its messaging system), after the funding problems of the initially foreseen partner.

The proactive actions of CISTER in solving this setback, and the quality of the performed work (done by the CISTER team Luis Ferreira, Michele Albano and César Teixeira), was explicitly commended by the Artemis-JU Project Officer in the review summary, particularly as it allowed a very smooth integration process of all ENCOURAGE modules.

The results of this review are successful, as the reviewers provided a positive feedback to the project work, accepting all technical deliverables submitted. In particular the reviewers appraised the demonstration of some of the project results in the demo site of a private house near Aalborg, and of the energy management tools.

In the follow-up meeting, the project consortium set the objectives and planned activities for the next Milestone, where further demonstrations of the project results and integration activities will be performed at the Terrassa campus in Barcelona, Spain.

More information at: http://www.encourage-project.eu/

P-SOCRATES: FP7 European Project led by CISTER/INESC-TEC Just Started

P-SOCRATES (Parallel SOftware framework for time-CRitical mAny-core sysTEmS) is an FP7 funded project aiming to develop new techniques for exploiting the massively parallel computation capabilities of next-generation many-core embedded platforms in a predictable way. These platforms are well positioned for intercepting the increasingly convergence of High-Performance Computing (HPC) and Embedded Computing (EC) domains need for predictable high-performance, allowing HPC and EC applications to be executed on efficient and powerful heterogeneous architectures integrating general-purpose processors with many-core computing fabrics.

P-SOCRATES will tackle this important challenge by merging leading research groups from the HPC and EC communities. The time-criticality and parallelization challenges common to both areas will be addressed by proposing an integrated framework for executing workload-intensive applications with real-time requirements on top of next-generation commercial-off-the-shelf (COTS) platforms based on many-core accelerated architectures. The project will investigate new HPC techniques that fulfil real-time requirements. The main sources of indeterminism will be identified, proposing efficient mapping and scheduling algorithms, along with the associated timing and schedulability analysis, to guarantee the real-time and performance requirements of the applications.

The project partners include as research institutions, besides ISEP, the Barcelona Supercomputing Centre (Spain), the University of Modena (Italy) and the Swiss Federal Institute of Technology Zurich (Switzerland). The industrial partners of the project include ATOS (Spain) and the SMEs Evidence (Italy) and Active Technologies (Italy). The project partners are supported by an industrial advisory board, which includes well-known multi-national companies including STMicroelectronics, IBM, Honeywell and Airbus.

Besides overall coordination and technical management, CISTER will be also deeply involved in the parallelism to real-time activity, leading in particular the Timing and Schedulability analysis work package.
The project started this October with the kick-off meeting taking place October 21-23 in Barcelona, Spain. The first two days were dedicated to discuss the technical advancements of the project, being the third day dedicated to a meeting of the project partners with the Industrial Advisory Board. The CISTER team at the meeting was integrated by Luis Miguel Pinho (Project Coordinator), Vincent Nélis, Patrick Yomsi and José Carlos Fonseca.

P-SOCRATES is a project in the scope of the call 10 of the FP7 program, under the Information objective “Advanced Computing Embedded and Control Systems”. The project will run for 3 years (until September 2016) with a total budget of 3.6 M€, being 2.76 M€ the EU contribution.

More information at: http://cordis.europa.eu/projects/rcn/110135_en.html

Best Presentation Award at RTNS 2013

CISTER’s researchers had a significant participation at the 21st International Conference on Real-Time Networks and Systems – held in Sophia Antipolis, France, October 16-18, with cutting edge research being presented in the areas of many-cores and network-on-chip, energy consumption, mixed criticality and multiprocessor scheduling. Notably CISTER received the Best Presentation Award for the paper entitled “Feasibility intervals for homogeneous multicores, asynchronous periodic tasks, and FJP schedulers” authored by Vincent Nelis, Patrick Meumeu Yomsi and Joël Goossens, which was presented by Vincent Nelis.

More information at: http://leat.unice.fr/RTNS2013/#page=home

European Project Proposal To Head For Negotiation Phase

The effort developed by CISTER/INESC-TEC in the last open call for research projects in the strategic ARTEMIS initiative is now giving its results as one of the project proposals is well headed into negotiations regarding its funding and approval. It is expected that the project can start early 2014.

The project, EMC2 (Embedded multi-core systems for mixed criticality applications in dynamic and changeable real-time environments) is an Artemis Innovation Pilot Project (AIPP) large project involving many large industrial partners, such as EADS, Thales, Infineon Technologies, Ericsson, BMW, Volvo, Philips Healthcare or Siemens.

The CISTER team in the project, lead by researcher Eduardo Tovar, will be involved in several of the research activities of the project, namely In “Executable Application Models and Design Tools for Mixed-Critical, Multi-Core Embeddded Systems” , “Dynamic Runtime Environments and Services” and “Multi-core Hardware Architectures and Concepts, and in two of the Living Labs (use cases).CISTER and Critical software lead a use case in the automotive area, being CISTER also involved in an avionics use case led by EADS.

CISTER/INESC-TEC Researcher Successfully Defends His PhD

Paulo Baltarejo Sousa, a long-time CISTER researcher has successfully defended his PhD titled “Real-Time Scheduling on Multi-core: Theory and Practice” on the 29th of October at Faculdade de Engenharia da Universidade do Porto.

The exam committee was Doutor Eugénio da Costa Oliveira, Professor Catedrático da FEUP Doutor Robert Davis, Senior Research Fellow in the Real-Time Systems Research Group, University of York, UK; Doutor Tommaso Cucinotta, Researcher at Alcatel-Lucent Bell Labs in Dublin, Ireland; Doutor José Manuel de Sousa de Matos Rufino, Professor Auxiliar do Departamento de Informática da Faculdade de Ciências da Universidade de Lisboa; Doutor Eduardo Manuel Medicis Tovar, Professor Coordenador do Departamento de Engenharia Informática do Instituto Superior de Engenharia do Porto e Investigador do CISTER-ISEP (Orientador); Doutor Pedro Alexandre Guimarães Lobo Ferreira Souto, Professor Auxiliar do Departamento de Engenharia Informática, Faculdade de Engenharia da Universidade do Porto.

New PhD Student at CISTER/INESC-TEC

CISTER has received a new PhD student that enrolled in the specialized stream in Embedded and Real-Time Systems in the Doctoral Program of the School of Engineering of the University of Porto (FEUP - Faculdade de Engenharia da Universidade do Porto).

Shashank Gaur, has a Master in Engineering of Embedded Systems by the Ecole Centrale d’Electronique (ECE), France and previously attained a Bachelor of Technology in Electronics and Communicatio from the B K Birla Institute of Engineering and Technology (BKBIET), India. He will be working in the area of Wireless Sensor Networks.

More information at: http://www.cister.isep.ipp.pt/people/shashank%2Bgaur/

© Copyright 2013 CISTER, School of Engineering of the Polytechnic Institute of Porto (ISEP/IPP)