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Geoffrey Nelissen (Publications)

Geoffrey Nelissen (Publications)

Geoffrey Nelissen (Publications)

PhD Université Libre de Bruxelles
Integrated PhD Researcher
May 2013-February 2020

Geoffrey Nelissen was born in Brussels, Belgium in 1985. He earned his MSc degree in Electrical Engineering at Université Libre de Bruxelles (ULB), Belgium in 2008. Then, he worked during four years as a PhD student in the PARTS research unit of ULB. In 2012, he received his PhD degree under the supervision of Professors Joël Goossens and Dragomir Milojevic, on the topic "Efficient Optimal Multiprocessor Scheduling Algorithms for Real-Time Systems". He is currently working at CISTER as a researcher scientist in the area of multiprocessor real-time scheduling theory. His research interests include real-time scheduling theory, real-time operating systems and multi-processors/multi-cores architectures.

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Journal Papers
HopliteRT*: Real-Time NoC for FPGA CISTER-TR-201102 
Yilian Ribot, Geoffrey NelissenIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, IEEE. Oct 2020, Volume 39, Issue 11, pp 3650-3661.This article was presented in part at the International Conference on Embedded Software 2020 and appears as part of the ESWEEK-TCAD special issue.
Conference or Workshop Papers/Talks
Work-In-Progress: WCRT Analysis for the 3-Phase Task Model in Partitioned Scheduling CISTER-TR-201005 
Jatin Arora, Cláudio Maia, Syed Aftab Rashid, Geoffrey Nelissen, Eduardo Tovar
ABSTRACT Additional Files: PDFPoster
Work in Progress Session, Real-Time Systems Symposium (RTSS 2020). 1 to 4, Dec, 2020. Online.
HopliteRT*: Real-Time NoC for FPGA CISTER-TR-200803 
Yilian Ribot, Geoffrey NelissenACM SIGBED International Conference on Embedded Software (EMSOFT 2020). 20 to 25, Sep, 2020. Online.EMSOFT 2020 is SIGBED's flagship conference and part of the Embedded Systems Week (ESWEEK).
Bounding Cache Persistence Reload Overheads for Set-Associative Caches CISTER-TR-200716 
Syed Aftab Rashid, Geoffrey Nelissen, Eduardo Tovar26th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA 2020). 19 to 21, Aug, 2020, Real-Time Systems, pp 1-10. Online.Outstanding Paper Award
A Holistic Memory Contention Analysis for Parallel Real-Time Tasks under Partitioned Scheduling CISTER-TR-200801 
Daniel Casini, Alessandro Biondi, Geoffrey Nelissen, Giorgio Buttazzo26th IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS 2020). 21 to 24, Apr, 2020, pp 239-252. Online.
Cache Persistence-Aware Memory Bus Contention Analysis for Multicore Systems CISTER-TR-191102 
Syed Aftab Rashid, Geoffrey Nelissen, Eduardo TovarDesign, Automation and Test in Europe Conference (DATE 2020). 9 to 13, Mar, 2020, pp 442-447. Online.
From Code to Weakly Hard Constraints: A Pragmatic End-to-End Toolchain for Timed C CISTER-TR-190905 
Saranya Natarajan, Mitra Nasri, David Broman, Björn B. Brandenburg, Geoffrey Nelissen40th IEEE Real-Time Systems Symposium (RTSS 2019). 18 to 21, Feb, 2020, pp 167-180. York, United Kingdom.RTSS 2019 originally postponed from December 2019 (Hong-Kong) to February 2020 (York, UK) was cancelled.