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Design and implementation of an FPGA-based NoC for Real Time Systems
Ref: CISTER-TR-190510       Publication Date: 9 to 13, Jul, 2019

Design and implementation of an FPGA-based NoC for Real Time Systems

Ref: CISTER-TR-190510       Publication Date: 9 to 13, Jul, 2019

Abstract:
In order to communicate, cores of a multi-core platform traditionally relied on shared busses. However, with the increasing number of computation nodes integrated in multi- and many-core platforms, Network-on-Chips (NoCs) emerged as a new alternative communication medium in Systems-on-Chips (SoCs). Hoplite-RT is a new NoC design that was recently proposed. Hoplite-RT is a compact design easy to analyze and with a low-cost implementation that was specifically tailored for FPGA. In this work, we introduce priority-based routing to Hoplite-RT and change the network topology so as to improve its timing behavior, i.e., its Worst-Case Traversal Time (WCTT).

Authors:
Yilian Ribot
,
Geoffrey Nelissen


Events:

ECRTS 2019
9, Jul, 2019 >> 12, Jul, 2019
31th Conference on Real-Time Systems
Stuttgart, Germany


31st Conference on Real-Time Systems (ECRTS 2019), WiP, pp 1-3.
Stuttgart, Germany.



Record Date: 29, May, 2019