Login

Memory Controllers for Mixed-Time-Criticality Systems: Architectures, Methodologies and Trade-offs
Ref: CISTER-TR-160401       Publication Date: 2016

Memory Controllers for Mixed-Time-Criticality Systems: Architectures, Methodologies and Trade-offs

Ref: CISTER-TR-160401       Publication Date: 2016

Abstract:
This book discusses the design and performance analysis of SDRAM controllers that cater to both real-time and best-effort applications, i.e. mixed-time-criticality memory controllers. The authors describe the state of the art, and then focus on an architecture template for reconfigurable memory controllers that addresses effectively the quickly evolving set of SDRAM standards, in terms of worst-case timing and power analysis, as well as implementation. A prototype implementation of the controller in SystemC and synthesizable VHDL for an FPGA development board are used as a proof of concept of the architecture template.

Authors:
Sven Goossens
,
Karthik Chandrasekar
,
Benny Ã…kesson
,
Kees Goossens


Book 202 pages.

DOI:10.1007/978-3-319-32094-6.
ISBN: 978-3-319-32093-9.

Notes: http://www.springer.com/gp/book/9783319320939



Record Date: 3, Apr, 2016